atomic.H

/*
 * This file is part of the "Archon" framework.
 * (http://files3d.sourceforge.net)
 *
 * Copyright © 2004 by Kristian Spangsege and Brian Kristiansen.
 *
 * Permission to use, copy, modify, and distribute this software and
 * its documentation under the terms of the GNU General Public License is
 * hereby granted. No representations are made about the suitability of
 * this software for any purpose. It is provided "as is" without express
 * or implied warranty. See the GNU General Public License
 * (http://www.gnu.org/copyleft/gpl.html) for more details.
 *
 * The characters in this file are ISO8859-1 encoded.
 *
 * The documentation in this file is in "Doxygen" style
 * (http://www.doxygen.org).
 */

#ifndef ARCHON_UTILITIES_ATOMIC_H
#define ARCHON_UTILITIES_ATOMIC_H

#if defined __GNUC__ && (defined __i386__ || defined __x86_64__)
#else // The default fall-back implementation (bad performance)
#include <archon/util/mutex.H>
#endif

namespace Archon
{
  namespace Utilities
  {
    using namespace std;

    struct Atomic
    {
      Atomic() {}
      explicit Atomic(int w) { set(w); }

      operator int() const { return get(); }

      Atomic &operator=(int w) { set(w);  return *this; }

      Atomic &operator++() { inc();  return *this; }

      int operator++(int) { return fetchAndAdd(1); }

      Atomic &operator--() { dec(); return *this; }

      int operator--(int) { return fetchAndAdd(-1); }

      Atomic &operator+=(int w) { add(w);  return *this; }

      Atomic &operator-=(int w) { add(-w); return *this; }

      int get() const;

      void set(int w);

      void inc();

      void dec();

      void add(int w);

      void sub(int w);

      bool decAndZeroTest();

      int fetchAndAdd(int w);

      bool testAndSet(int t, int w);

    private:

#if defined __GNUC__ && (defined __i386__ || defined __x86_64__)
      volatile int v;
#else // The default fall-back implementation (bad performance)
      Mutex m;
      int v;
#endif

      Atomic(const Atomic &); // Hide
    };

#if defined __GNUC__ && (defined __i386__ || defined __x86_64__)

    /*
     * On the platforms i486, i586, i686 and x86_64 we do not need
     * memory barriers to guarantee that a memory write on CPU 1 is
     * reflected imediately in a momory read by CPU 2. This is why
     * "memory" is never added to the clobber lists in the asm
     * statements below.
     */

    /*
     * We can just use a simple read. We always read from memory
     * since we have declared v to be volatile. Also, on the Intel
     * platform we do not need to concern ourselves with memory
     * ordering, thus we do not need memory barriers here (explicit
     * synchronizarion of memory update/access accross several CPUs.)
     */
    inline int Atomic::get() const
    {
      return v;
    }

    /*
     * We can just use a simple assignment. We always write to memory
     * since we have declared v to be volatile. Also, on the Intel
     * platform we do not need to concern ourselves with memory
     * ordering, thus we do not need memory barriers here (explicit
     * synchronizarion of memory update/access accross several CPUs.)
     */
    inline void Atomic::set(int w)
    {
      v = w;
    }

    inline void Atomic::inc()
    {
      asm volatile("lock; incl %0" : "=m"(v) : "m"(v));
    }

    inline void Atomic::dec()
    {
      asm volatile("lock; decl %0" : "=m"(v) : "m"(v));
    }

    inline void Atomic::add(int w)
    {
      asm volatile("lock; addl %1, %0" : "=m"(v) : "ir"(w), "m"(v));
    }

    inline void Atomic::sub(int w)
    {
      asm volatile("lock; subl %1, %0" : "=m"(v) : "ir"(w), "m"(v));
    }

    inline bool Atomic::decAndZeroTest()
    {
      unsigned char r;
      asm volatile("lock; decl %0; sete %1" : "=m"(v), "=qm"(r) : "m"(v));
      return r != 0;
    }

    inline int Atomic::fetchAndAdd(int w)
    {
      int r;
      asm volatile("lock; xaddl %0, %1" : "=r"(r), "=m"(v) : "0"(w), "m"(v));
      return r;
    }

    inline bool Atomic::testAndSet(int t, int w)
    {
      int r;
      asm volatile("lock; cmpxchgl %2, %1" : "=a"(r), "=m"(v) : "r"(w), "m"(v), "0"(t));
      return r == t;
    }

#else // The default fall-back implementation (bad performance)

    inline int Atomic::get() const
    {
      Mutex::Lock l(m);
      return v;
    }

    inline void Atomic::set(int w)
    {
      Mutex::Lock l(m);
      v = w;
    }

    inline void Atomic::inc()
    {
      Mutex::Lock l(m);
      ++v;
    }

    inline void Atomic::dec()
    {
      Mutex::Lock l(m);
      --v;
    }

    inline void Atomic::add(int w)
    {
      Mutex::Lock l(m);
      v += w;
    }

    inline void Atomic::sub(int w)
    {
      Mutex::Lock l(m);
      v -= w;
    }

    inline bool Atomic::decAndZeroTest()
    {
      Mutex::Lock l(m);
      return --u == 0:
    }

    inline int Atomic::fetchAndAdd(int w)
    {
      Mutex::Lock l(m);
      int u = v;
      v += w;
      return u;
    }

    inline bool Atomic::testAndSet(int t, int w)
    {
      Mutex::Lock l(m);
      if(v!=t) return false;
      v = w;
      return true;
    }

#endif

  }
}

#endif // ARCHON_UTILITIES_ATOMIC_H

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